Digital-to-analog conversion is required for many applications, including clock and data recovery (CDR) applications for digital communications. FIG. 1 is a block diagram of a conventional digital-to-analog (D/A) converter 100. As shown in FIG. 1, a digital-to-analog converter 100 translates a given digital word into an analog electrical signal, for example a voltage or a current. In a Phase Locked Loop (PLL) (or a Delay Locked Loop (DLL)), for example, a digital-to-analog converter 100 may convert a digital word representing a phase offset or time delay into an analog bias signal that controls the phase (or delay) of a clock signal.
In general, the value of the analog output, Y, of a typical D/A converter with an N-bit binary input word is a fraction of a full-scale output value, this fraction being defined by the value of the binary input. Specifically, for an exemplary digital-to-analog converter 100, the analog output, Y, is equal to
                    Y        =                              (                          X                              2                N                                      )                    ⁢                      Y            MAX                                              (        1        )            where YMAX is the full-scale value of the D/A converter, and X is the decimal equivalent of the binary input word. For example, suppose that N equals 6, and that the D/A converter 100 generates a current with a full-scale value of 1 mA. If the digital input word is set to 100000, i.e., the binary representation of 32, then the output current of the D/A converter will be equal to 0.5 mA ((1 mA)×(32/64)). Similarly, if the digital input word is set to 010000, then the output current would be equal to 0.25 mA ((1 mA)×(16/64)).
When the binary input to the D/A converter 100 increments or decrements by 1, the output, Y, changes by an amount equal to YMAX/2N, which is known as the step size of the D/A converter. The step size represents the maximum value of the error that occurs if the analog output of the D/A converter is used to approximate a continuously valued analog signal. This error, known as quantization error, must be taken into account in the design of any system that uses a D/A converter. In a standard D/A converter with a specified output range, the step size can only be reduced by increasing N, which results in an increase in the size, complexity, and cost of the converter.
The step size of a conventional D/A converter is constant; thus, a single step change results in a much higher percentage change in the analog output, Y, near the low end of the D/A output range than it does at the high end of the range. For example, suppose that a given application requires the output of the D/A converter 100 to cover the range of 0.1×YMAX to 0.9×YMAX, while also requiring that the step size be no larger than 1% of the instantaneous value of the output over the specified output range. Then, the step size of the D/A converter 100 must be no larger than 0.001×YMAX, which would require the D/A converter 100 to be at least a 10-bit converter. Furthermore, when Y is close to the upper end of the specified output range, the step size would be significantly smaller than required by the specification. Thus, in many applications, the step size of a conventional D/A converter, and thus the complexity of the circuit, is set by the precision required at the low end of the output range.
In many applications in which quantization error must be very small, the number of bits, N, in the digital control word of the conventional D/A converter would have to be quite large. In many such applications, it may be possible to first perform a coarse adjustment of the analog output signal, Y, and then when the value of this signal is within a predefined tolerance of a desired value, to perform either a one-time or a continuous fine adjustment of the analog output signal, Y.
A need therefore exists for improved techniques for digital-to-analog conversion. A further need exists for a digital-to-analog converter that is comprised of two or more digital-to-analog converters that may each be employed during different operating modes.